Cooperating Sequential Tasks

  1. Introduction
    1. Arduino
    2. Interrupts
  2. Simple Tasks
  3. Multiple Tasks
  4. Communicating Tasks
  5. Communicating Values
  6. Synchronising Tasks
  7. Buffered Communication
  8. Multiple Senders
  9. Conditional Tasks
  10. Transput
  11. Implementation
    1. Common Data
    2. Tasks
    3. task_builder
    4. task
    5. channel
    6. virtual_machine
    7. set
    8. queue
    9. clock
    10. standard
    11. Adjusting Limits


Most processors provide a hardware mechanism which allows the currently executing sequence of machine instructions to be interrupted[1] by an external signal such as a hardware clock ticking or a device indicating that it has completed an operation, e.g. writing a block to a disk.

A minimal interrupt mechanism must, wait until the current instruction has completed, store the value of the program counter in a standard place in memory, and then load the program counter from another standard place in memory. The effect of this is to remember where the current instruction sequence was interrupted and to transfer control to an "interrupt routine". Processors often have much more complex interrupt systems which allow different interrupt routines to be called in response to different external interrupt signals.

In a multitasking system, the interrupt routine must store away all of the information needed to restart the interrupted task, e.g. the current value of all the registers it was using, decide which task to execute next and restore its registers, including the value of the program counter stored when it was interrupted. More complex processors often provide hardware mechanisms specifically designed to support multitasking, e.g. special instructions for swapping the contents of all registers with a block of memory.